Our research focuses on exploring the designs of CPU, GPU, NPU, and DPU architectures to maximize their potential for high-performance computing. We prioritize optimizing these architectures to achieve efficient performance enhancements while also considering low-power designs to balance performance and energy consumption. Additionally, we are researching fault-tolerant and secure architectures to enhance system reliability and resilience against errors, ensuring processors can maintain system stability and recoverability.

We research memory architectures, exploring diverse areas such as DRAM Systems, Heterogeneous Memory Systems, Secure Memory, and Near-data Processing. We're passionate about understanding how these architectures function and interact, aiming to optimize their performance, low power, and security for a wide range of computing tasks. Our research aims to enhance the efficiency of DRAM systems, implement solutions for future memory systems, and design near-data processing systems such as process-in-memory (PIM) architecture. 

We research Accelerator System Design, encompassing AI Chip Design, domain-specific optimization systems, hardware/software co-design, and on-device AI acceleration. We're keen on optimizing performance through seamless integration of hardware and software, crafting hardware solutions tailored for specific applications. Addressing the escalating size and complexity of large-scale AI models (LLMs) poses a significant challenge, and we're designing optimized system architectures to tackle this issue effectively.