Processor Architecture
Processor Architecture
Our research dives into the design and optimization of cutting-edge processor architectures, including CPUs, GPUs, NPUs, and DPUs. Our primary goal is to maximize high-performance computing potential while meticulously balancing it with energy efficiency. Beyond performance, we're dedicated to building fault-tolerant and secure architectures, ensuring our systems are not just fast, but also highly reliable and resilient against errors, promoting unwavering stability and swift recovery.
Related Publications (Processor Architecture)
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CATop-tier Conf.Exploiting Inter-block Entropy to Enhance the Compressibility of Blocks with Diverse Data
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CATop-tier Jnl.CID: Co-Architecting Instruction-Cache and Decompression System for Embedded Systems
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CAJournalETS: Efficient Task Scheduler for Per-Core DVFS-Enabled Multicore Processors
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CAJournalMH-Cache: A Multi-retention STT-RAM LLC for Mobile Hardware Rendering Systems
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CATop-tier Jnl.Smart ECC Allocation Cache Utilizing Cache-Data Space
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CAJournalFlexible ECC Management for Low-Cost Transient-Error Protection of Last-Level Caches
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CAJournalExploiting Same Tag Bits to Improve the Reliability of Cache Memories
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CAConf.ECC String: Flexible ECC Management for Low-Cost Error Protection of L2 Caches